2002 · 15 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyDigital Integrated Circuit DesignIntegrated Circuit DesignLow-noise Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsBody EffectCmos Digital Circuit DesignCmos Logic CircuitsDynamic Logic CircuitsFully Depleted Silicon-on-insulator TransistorsIntegrated Circuit NoiseMultiplexersNoise Margin Analysis
This paper presents a detailed study on the impact of floating body in partially-depleted (PD) SOI MOSFET on various digital VLSI CMOS circuit families. The parasitic bipolar effect resulting from the floating body is shown to degrade the circuit noise margin and stability in general. In certain dynamic circuits and wide multiplexers, the parasitic bipolar effect is shown to cause logic state error if not properly accounted for.
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