L. Hsu

Floating-body effects in partially depleted SOI CMOS circuits

Pong-Fei Lu, Ching-Te Chuang, Ji Jin et al. · IEEE Journal of Solid-State Circuits · 1997 · 77 citations

Engineering, Computer Engineering, Electrical Engineering +17

SRAM bitline circuits on PD SOI: advantages and concerns

J.B. Kuang, S. Ratanaphanyarat, M.J. Saccamango et al. · IEEE Journal of Solid-State Circuits · 1997 · 22 citations

Engineering, Computer Engineering, Electrical Engineering +15

Dynamic Threshold Body- And Gate-coupled SOI ESD Protection Networks

Steven H. Voldman, F. Assaderaghi, J. Mandelman et al. · 1997 · 22 citations

Engineering, Electrical Engineering, Microelectronics +5

A 390-mm/sup 2/, 16-bank, 1-Gb DDR SDRAM with hybrid bitline architecture

T. Kirihata, Georg Mueller, Bing Ji et al. · IEEE Journal of Solid-State Circuits · 1999 · 18 citations

Engineering, Computer Engineering, Electrical Engineering +15

Dynamic threshold body- and gate-coupled SOI ESD protection networks

Steven H. Voldman, F. Assaderaghi, J. Mandelman et al. · Journal of Electrostatics · 1998 · 17 citations

Engineering, Electrical Engineering, Microelectronics +5