Ching-Te Chuang

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai et al. · IEEE Journal of Solid-State Circuits · 2012 · 171 citations

Non-volatile Memory, Electrical Engineering, Subthreshold Sram +13

Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist

Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2010 · 137 citations

Low-power Electronics, Positive Feedback, Electrical Engineering +11

Floating-body effects in partially depleted SOI CMOS circuits

Pong-Fei Lu, Ching-Te Chuang, Ji Jin et al. · IEEE Journal of Solid-State Circuits · 1997 · 77 citations

Hardware Security, Electrical Engineering, Engineering +12

Comparison of 4T and 6T FinFET SRAM Cells for Subthreshold Operation Considering Variability—A Model-Based Approach

Ming-Long Fan, Yusheng Wu, Vita Pi‐Ho Hu et al. · IEEE Transactions on Electron Devices · 2011 · 42 citations

Device Modeling, Relaxed Device Dimensions, Electrical Engineering +12

Impact of NBTI and PBTI in SRAM bit-cells: Relative sensitivities and guidelines for application-specific target stability/performance

Aditya Bansal, Rahul Rao, Jae‐Joon Kim et al. · IEEE International Reliability Physics Symposium proceedings · 2009 · 36 citations

Non-volatile Memory, Engineering, Vlsi Design +16