Jae‐Joon Kim

A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS

Ik‐Joon Chang, Jae‐Joon Kim, Sang Phill Park et al. · IEEE Journal of Solid-State Circuits · 2009 · 476 citations

Hardware Security, Sub-threshold Sram Array, Electrical Engineering +13

A 32kb 10T Subthreshold SRAM Array with Bit-Interleaving and Differential Read Scheme in 90nm CMOS

Ik‐Joon Chang, Jae‐Joon Kim, Sang Phill Park et al. · 2008 · 123 citations

Low-power Electronics, Electrical Engineering, Engineering +11

Negative Transconductance Heterojunction Organic Transistors and their Application to Full‐Swing Ternary Circuits

Hocheon Yoo, Sungmin On, Seon Baek Lee et al. · Advanced Materials · 2019 · 117 citations

Area-Efficient and Variation-Tolerant In-Memory BNN Computing using 6T SRAM Array

Jin-Seok Kim, Jongeun Koo, Taesu Kim et al. · 2019 · 89 citations

Electrical Engineering, Engineering, Hardware Acceleration +13

A forward body-biased low-leakage SRAM cache: device, circuit and architecture considerations

C.H. Kim, Jae‐Joon Kim, Saibal Mukhopadhyay et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2005 · 88 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +12