Noise Margin Analysis
Noise Margin Analysis is a metric-based method in electronic circuit design that quantifies the tolerance of a logic circuit to undesired voltage fluctuations by determining the difference between the actual signal levels and the minimum acceptable thresholds for correct logical operation, particularly under near-threshold and subthreshold operating conditions where signal integrity is highly sensitive to process, voltage, and temperature variations.
161
Publications
7.6K
Citations
571
Authors
159
Institutions
Publications per year
2017–2026
18
Variants
Noise Margin Calculation
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Stanford University
Stanford, United States
7 h-index
27 publications
1.2K citations
Philips (Netherlands)
Amsterdam, The Netherlands
7 h-index
16 publications
970 citations
IBM (United States)
Armonk, United States
7 h-index
23 publications
1.9K citations
The University of Tokyo
Tokyo, Japan
5 h-index
21 publications
499 citations
University of Siena
Siena, Italy
5 h-index
15 publications
493 citations
Massachusetts Institute of Technology
Cambridge, United States
5 h-index
15 publications
2K citations

University of Toronto
Toronto, Canada
5 h-index
10 publications
304 citations
Intel (United States)
Santa Clara, United States
5 h-index
9 publications
345 citations
1–8 of 159
19 publications · 769 citations
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13 publications · 1.1K citations
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10 publications · 573 citations
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5 publications · 287 citations
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4 publications · 163 citations
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