Thermal management in TSV based 3D IC Integration: A survey

3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration

Kaustav Banerjee, S.J. Souri, Pawan Kapur et al. · Proceedings of the IEEE · 2001 · 1K citations

Engineering, Vlsi Design, Device Integration +22

Three-Dimensional Integrated Circuits and the Future of System-on-Chip Designs

Robert Patti · Proceedings of the IEEE · 2006 · 589 citations

Engineering, Computer Architecture, Integrated Circuits +19

Thermal management of 3D IC integration with TSV (through silicon via)

John H. Lau, Tang Gong Yue · 2009 · 183 citations

Engineering, Stacked Tsv, Advanced Packaging (Semiconductors) +19

Low Temperature Cu–Cu Bonding Technology in Three-Dimensional Integration: An Extensive Review

Asisa Kumar Panigrahy, Kuan‐Neng Chen · Journal of Electronic Packaging · 2017 · 115 citations

Engineering, Integrated Circuits, Interconnect (Integrated Circuits) +20

Power Blurring: Fast Static and Transient Thermal Analysis Method for Packaged Integrated Circuits and Power Devices

Amirkoushyar Ziabari, Je-Hyoung Park, Ehsan K. Ardestani et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 73 citations

Engineering, Vlsi Design, Power Devices +26