Warpage and Thermal Characterization of Fan-Out Wafer-Level Packaging

Abstract

In this study, the warpage and thermal performances of fan-out wafer-level packaging (FOWLP) are investigated. Emphasis is placed on the characterization of the effects of FOWLP important parameters, such as chip size, chip thickness, package/chip area ratio, epoxy molding compound (EMC), chip EMC cap, carrier material and thickness, and die-attach film, on the warpage after post mold cure (PMC) and backgrinding of the EMC. The simulation results are compared with the experimental measurements. Also, the thermal performance (junction-to-ambient thermal resistance) of FOWLP with various chip thicknesses is characterized. Finally, some FOWLP important parameters affecting the warpage and thermal performances are recommended.