IEEE Transactions on Electron Devices · 2017 · 22 citations · 29 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsDevice ModelingDevice SimulationIntegrated Circuit DesignSemiconductor Device MaterialsSemiconductor PhysicsThermal Properties Of SemiconductorsEquivalent CircuitsHigh-temperature ElectronicsIsolationLeakageLeakage Current ModelingSilicon Carbide (Sic) MaterialsSilicon-on-insulator CmosSilicon-on-insulator Technology
This paper analyses the effect of employing an Si on semi-insulating SiC (Si/SiC) device architecture for the implementation of 600-V LDMOSFETs using junction isolation and dielectric isolation reduced surface electric field technologies for high-temperature operations up to 300 °C. Simulations are carried out for two Si/SiC transistors designed with either PN or silicon-on-insulator (SOI) and their equivalent structures employing bulk-Si or SOI substrates. Through comparisons, it is shown that the Si/SiC devices have the potential to operate with an off-state leakage current as low as the SOI device. However, the low-side resistance of the SOI LDMOSFET is smaller in value and less sensitive to temperature, outperforming both Si/SiC devices. Conversely, under high-side configurations, the Si/SiC transistors have resistances lower than that of the SOI at high substrate bias, and invariablewith substrate potential up to -200 V, which behaves similar to the bulk-Si LDMOS at 300 K. Furthermore, the thermal advantage of the Si/SiC over other structures is demonstrated by using a rectanglepower pulse setup in TechnologyComputer-Aided Design simulations.
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Realization of high breakdown voltage (<700 V) in thin SOI devices
S. Merchant, E. Arnold, Helmut Baumgart et al. · 2002 · 198 citations
A new 800 V lateral MOSFET with dual conduction paths
Don Disney, A.K. Paul, M. Darwish et al. · 2002 · 118 citations