Drain-induced barrier lowering in buried-channel MOSFET's

M.J. Van der Tol, S.G. Chamberlain

IEEE Transactions on Electron Devices · 1993 · 21 citations · 12 references

Concepts

Abstract

In the literature, it is unclear whether or not buried-channel (BC) MOSFETs are less resistant to drain-induced barrier lowering than surface-channel MOSFETs. The authors clarify this confusion and experimentally demonstrate the relationship between the threshold voltage and channel length reduction for normally-on (inverting) BC-MOSFETs. The results are compared with similar measurements on surface-channel MOSFETs. It is shown that BC-MOSFETs are more prone to drain-induced barrier lowering than surface-channel MOSFETs. A simple analytic model is derived for the subthreshold current in small-geometry BC-MOSFETs. The model shows good agreement with experimental measurements and with subthreshold currents obtained using a two-dimensional numerical simulator.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

12