2007 · 14 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ModelingDevice SimulationIntegrated Circuit DesignMemory DevicesCapacitanceCapacitance ReductionFlash MemoryFlash Memory DevicesInterferenceMemory Circuit DesignMemory Device SimulationNand Flash Memory
In IMD study Rs reduction and better uniformity as well as lower capacitance were achieved in 60 nm 2 Giga Bit NAND flash memory. It alos fabricated 70 % air-gap of gate and calculated interference reduction in 45 nm device when it was applied throughout simulation. It is sure that we should apply this air-gap process to future device in order to meet device property of cell Vt shift and capacitance.
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