IEEE Transactions on Electron Devices · 1988 · 12 citations · 5 references
EngineeringElectrical EngineeringMaterials ScienceFault-tolerant ComputingMicroelectronicsSemiconductor DevicesDesign For TestabilityDigital Logic DesignLatchesLatching MechanismsLatchup Mitigation
Presents the table of contents for this issue of the publication
5
Surface induced latchup in VLSI CMOS circuits
D. Takacs, C. Werner, J. Harter et al. · IEEE Transactions on Electron Devices · 1984 · 31 citations
Engineering, Computer Engineering, Electrical Engineering +17
Comparison of latch-up in p- and n-well CMOS circuits
D. Takacs, J. Harter, E.P. Jacobs et al. · 1983 · 27 citations