J. Winnerl

Comparison of latch-up in p- and n-well CMOS circuits

D. Takacs, J. Harter, E.P. Jacobs et al. · 1983 · 27 citations

Engineering, Electrical Engineering, Microelectronics +10

Pipelined architecture for fast CMOS buffer RAMs

D. Schmitt‐Landsiedel, B. Hoppe, G. Neuendorf et al. · IEEE Journal of Solid-State Circuits · 1990 · 15 citations

Engineering, Computer Engineering, Electrical Engineering +16

Improvement of latchup hardness by geometry and technology tuning

C. Mazuré, W. Reczek, D. Takacs et al. · IEEE Transactions on Electron Devices · 1988 · 12 citations

Engineering, Electrical Engineering, Materials Science +8