Requirements for ultra-thin-film devices and new materials for the CMOS roadmap

Experimental study on carrier transport mechanism in ultrathin-body SOI nand p-MOSFETs with SOI thickness less than 5 nm

Ken Uchida, Hiroshi Watanabe, A. Kinoshita et al. · 2003 · 306 citations

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Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation

H.‐S. Philip Wong, D.J. Frank, P. M. Solomon · 2002 · 270 citations

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Silicon-on-Nothing (SON)-an innovative process for advanced CMOS

M. Jurczak, T. Skotnicki, M. Paoli et al. · IEEE Transactions on Electron Devices · 2000 · 217 citations

Engineering, Electrical Engineering, Materials Science +17

Fringing fields in sub-0.1 μm fully depleted SOI MOSFETs: optimization of the device architecture

T. Ernst, C. Tinella, C. Raynaud et al. · Solid-State Electronics · 2002 · 149 citations

Engineering, Electrical Engineering, Electronic Materials +15

Deep-submicrometer channel design in silicon-on-insulator (SOI) MOSFET's

L.T. Su, J.B. Jacobs, J.E. Chung et al. · IEEE Electron Device Letters · 1994 · 94 citations

Engineering, Electrical Engineering, Materials Science +17