Dual Gate ZnO-Based Thin-Film Transistors Operating at 5 V: nor Gate Application

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20-nm-thick <formula formulatype="inline"><tex Notation="TeX">$\hbox{Al}_{2}\hbox{O}_{3}$</tex></formula> for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 <formula formulatype="inline"><tex Notation="TeX">$^{ \circ}\hbox{C}$</tex></formula>. As characterized with single gate (SG), DG, and ground plane (GP) modes, our ZnO TFTs are well operated under 5 V. DG-mode TFT showed a field mobility of 0.38 <formula formulatype="inline"><tex Notation="TeX">$ \hbox{cm}^{2}/\hbox{V} \cdot \hbox{s}$</tex></formula>, a high saturation current of 6 <formula formulatype="inline"> <tex Notation="TeX">$\mu\hbox{A}$</tex></formula>, and an on/off current ratio of <formula formulatype="inline"><tex Notation="TeX">$\sim \hbox{10}^{6}$</tex></formula>, while SG- and GP-mode TFTs showed a similar value of mobility but with lower current. Using DG and GP modes, <emphasis emphasistype="smcaps">nor</emphasis> gate operation was well demonstrated. </para>