One-device cells for dynamic random-access memories: A tutorial

Abstract

The evolutionary development of one-device cells for dynamic random-access memory (RAM) integrated circuits is described in this paper. From an examination of the areal layout (planar top view) and the cross section (vertical topography), various memory cells are compared in a systematic manner. Structural features such as contact via formation, bit-line and word-line pitch, metal step coverage, and cell placement along the bit line are also considered. Some new dynamic RAM cell concepts such as doubly doped storage capacitors, self-registering contacts, and VMOS FET's are discussed. From an examination of commercially available dynamic RAM chips, a basic lithographic groundrule was determined. It will be shown that, although this lithographic figure of merit has steadily decreased over the past four years, the number of lithographic squares per cell has remained constant for different cell types.