IEEE Electron Device Letters · 2002 · 42 citations · 3 references
EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesDevice ModelingDevice ScalingDevice SimulationDopingIon ImplantationMetal-oxide-semiconductor Field-effect TransistorsDopant DistributionDopant ImplantationGate Oxide DegradationIon Implantation EffectsMos Capacitance SimulationNumerical Device SimulationPolysiliconScaling Effects In Cmos
Degradation of MOS gate capacitance in the inversion region becomes worse as the gate length is scaled down, according to a new experiment. Namely, the polysilicon depletion effect has gate length dependence. The origin of this gate length-dependent polydepletion effect has been modeled and verified by using device simulation. As a result, the gradient of dopant distribution resulting from ion implantation is shown to be an additional potential drop in the polygate. In addition, the enlarged depletion width at the gate sidewall can worsen the polydepletion effect for very-small MOSFETs.
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MOSFET models for VLSI circuit simulation
Neha Arora · Microelectronics Journal · 1995 · 190 citations
Engineering, Computer Engineering, Electrical Engineering +14