Multi-finger turn-on circuits and design techniques for enhanced ESD performance and width-scaling

Abstract

A silicon-proven multi-finger turn-on (MFT) design technique that enables ESD width scaling combined with very low dynamic on-resistance is presented in various implementations. It can be applied to (self-protecting) drivers and/or ESD protection design. Using a novel merged ballast circuit design, very compact ESD protection configurations with an ESD area performance up to 5VHBM/um2 can be realized both in fully silicided and silicide blocked NMOS designs.