A. Amerasekera - Concepedia

Author

A. Amerasekera

Texas Instruments (United States)

Also Known As

A. Amerasekera, Ajith Amerasekera

Publications

2.6K

Citations

H-Index

Concepts

All Affiliations

Texas Instruments (United States)University of California, Berkeley Semiconductor Manufacturing International (Italy)Hodges University Philips (Netherlands)

About

A. Amerasekera is an author at Texas Instruments (United States) specializing in electrical engineering, microelectronics, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	26	45	2.1K
2	Electrical Engineering	26	44	2.1K
3	Computer Engineering	18	21	1.1K
4	Applied Physics	15	19	745
5	Materials Engineering	8	8	246

A. Amerasekera

Publications

2.2K

Citations

H-Index

Page 1

	Year	Citations
The impact of technology scaling on ESD robustness and protection circuit design A. Amerasekera, C. Duvvury IEEE Transactions on Components Packaging and Manufacturing Technology Part A Hardware SecurityElectrical EngineeringEngineeringVlsi DesignCircuit Design	1995	158
Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations A. Amerasekera, S. Ramaswamy, Mi-Chang Chang, EngineeringVlsi DesignCircuit-level SimulatorPower ElectronicsPhysical Design (Electronics)	1996	147
A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery Mike Harwood, N. Warke, R. S. Simpson, Electrical EngineeringEngineeringDigital Receiver EqualizationBackplane Data CommunicationData Converter	2007	145
ESD: a pervasive reliability concern for IC technologies C. Duvvury, A. Amerasekera Proceedings of the IEEE EngineeringElectronic DesignComputer ArchitectureIntegrated CircuitsHardware Systems	1993	144
Characterization and modeling of second breakdown in NMOST's for the extraction of ESD-related process and design parameters A. Amerasekera, L. van Roozendaal, J. J. P. Bruines, IEEE Transactions on Electron Devices EngineeringEsd-related ProcessDesign ParametersGlow DischargePower Electronics	1991	114
Self-heating effects in basic semiconductor structures A. Amerasekera, Meng‐Chou Chang, J.A. Seitchik, IEEE Transactions on Electron Devices SemiconductorsSemiconductor TechnologyElectrical EngineeringEngineeringPhysics	1993	97
Substrate triggering and salicide effects on ESD performance and protection circuit design in deep submicron CMOS processes A. Amerasekera, C. Duvvury, V. Reddy, Salicide EffectsElectrical EngineeringLocal Substrate PotentialEngineeringVlsi Design	2002	91
ESD failure modes: characteristics mechanisms, and process influences A. Amerasekera, W. van den Abeelen, L. van Roozendaal, IEEE Transactions on Electron Devices EngineeringGlow DischargeReliability EngineeringElectrostatic DischargeFailure Analysis	1992	81
Substrate pump NMOS for ESD protection applications C. Duvvury, S. Ramaswamy, A. Amerasekera, Hardware SecurityElectrical EngineeringDevice Design OptimizationVlsi DesignUniform Npn Protection	2002	80
The effect of interconnect scaling and low-k dielectric on the thermal characteristics of the IC metal Kaustav Banerjee, A. Amerasekera, G. Dixit, EngineeringLow-k DielectricThermal ConductivityInterconnect (Integrated Circuits)Superconductivity	2002	72

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