Mi-Chang Chang

Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations

A. Amerasekera, S. Ramaswamy, Mi-Chang Chang et al. · 1996 · 147 citations

Engineering, Vlsi Design, Circuit-level Simulator +16

pn -junction delineation in Si devices using scanning capacitance spectroscopy

Hal Edwards, Vladimir A. Ukraintsev, Richard San Martin et al. · Journal of Applied Physics · 2000 · 61 citations

Electrical Engineering, Engineering, Physics +14

Process Integration and Manufacturasility Issues for High Performance Multilevel Interconnect

Shin-Puu Jeng, Robert Havemann, Mi-Chang Chang · MRS Proceedings · 1994 · 47 citations

Process Integration, Electrical Engineering, Physical Design (Electronics) +9

Transistor-and Circuit-Design Optimization for Low-Power CMOS

Mi-Chang Chang, Chih-Sheng Chang, Chih‐Ping Chao et al. · IEEE Transactions on Electron Devices · 2008 · 35 citations

Low-power Electronics, Electrical Engineering, Engineering +13

Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high-current simulations

A. Amerasekera, Mi-Chang Chang, C. Duvvury et al. · IEEE Circuits and Devices Magazine · 1997 · 24 citations

Device Modeling, Electrical Engineering, Engineering +15