GGSCRs: GGNMOS Triggered silicon controlled rectifiers for ESD protection in deep sub-micron CMOS processes

C. Russ, M. Mergens, K. Verhaege, J. Armer, P. Jozwiak, G. Kolluri, L.R. Avery

Electrical Overstress/Electrostatic Discharge Symposium · 2001 · 69 citations · 9 references

Concepts

Abstract

In this paper, design aspects, operation, protection capability and applications of SCRs in deep sub-micron CMOS are addressed. A novel Grounded-Gate NMOS Triggered SCR device (GGSCR) is introduced and compared to the LVTSCR. Experimental verification, including endurance testing, demonstrates that GGSCRs can fulfill all ESD protection requirements for todays IC applications in different 0.25 um, 0.18 um and 0.13 um CMOS processes.

References

9