Journal of Applied Physics · 1984 · 24 citations · 9 references
EngineeringMaterials EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsDopingIon ImplantationP-n JunctionsSemiconductor Device MaterialsAnnealing EffectsAnnealing Temperature EffectsDopant ActivationDopant ImplantationDopant RedistributionLow-energy Ion ImplantationShallow Junction FormationSilicon Annealing
A new low-temperature process that anneals out ion-implantation damage and activates the dopant in extremely shallow, implanted n+/p structures is presented. This technique employs low-energy (0.4 keV) H+ ion implantation following arsenic ion implantation and then a subsequent low-temperature (500–600 °C) furnace anneal. Very little dopant redistribution takes place with this new process and the device characteristics are comparable to other processes employing short-time, higher-temperature anneals.
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Hydrogen passivation of point defects in silicon
J. L. Benton, C. J. Doherty, S. D. Ferris et al. · Applied Physics Letters · 1980 · 174 citations
Passivation of grain boundaries in silicon
C. H. Seager, D.J. Sharp, J.K.G. Panitz et al. · Journal of Vacuum Science and Technology · 1982 · 54 citations
Natural Sciences, Materials Engineering, Materials Science +17