High-Performance Silicon Nanotube Tunneling FET for Ultralow-Power Logic Applications

Hossain M. Fahad, Muhammad M. Hussain

IEEE Transactions on Electron Devices · 2013 · 130 citations · 21 references

Concepts

Abstract

To increase typically low output drive currents from tunnel field-effect transistors (FETs), we show a silicon vertical nanotube (NT) architecture-based FET's effectiveness. Using core (inner) and shell (outer) gate stacks, the silicon NT tunneling FET shows a sub-60 mV/dec subthreshold slope, ultralow off -state leakage current, higher drive current compared with gate-all-around nanowire silicon tunnel FETs.

References

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