2012 · 15 citations · 26 references
EngineeringSystems EngineeringFault ToleranceFault-tolerant ComputingFault-tolerant SystemsBuilt-in Self-testDefect CharacterizationDesign For TestabilityDevice CharacterizationFault DetectionFault CharacterizationIn Situ CharacterizationLeakageParametric FaultsProcess MonitoringStuck-at Fault TestingTiming Faults
A TSV in a 3D IC could suffer from two major types of parametric faults — a resistive open fault, or a leakage fault. Dealing with these parametric faults (which do not destroy the functionality of a TSV completely but only degrade its quality or performance) is often trickier than dealing with a stuck-at fault. Previous works have not proposed a unified test structure and method that can characterize their respective effects. Based on our previous test structure, called VOT (Variable Output Threshold) scheme for delay faults, we propose a unified in-situ characterization flow for both parametric fault types of a post-bond TSV. With this flow, one can easily derive a more insightful assessment of a parametric fault in production test, process monitoring, and/or diagnosis-driven yield learning.
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8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology
Uksong Kang, Hoeju Chung, Seongmoo Heo et al. · IEEE Journal of Solid-State Circuits · 2010 · 487 citations
Engineering, Computer Engineering, Electrical Engineering +15
TSV redundancy: Architecture and design issues in 3D IC
Ang-Chih Hsieh, TingTing Hwang, Ming-Tung Chang et al. · 2010 · 150 citations