Robust Surface-Potential-Based Compact Model for GaN HEMT IC Design

Sourabh Khandelwal, Chandan Yadav, Shantanu Agnihotri, Yogesh Singh Chauhan, Arnaud Curutchet, Thomas Zimmer, Jean-Claude de Jaeger, Nicolas Defrance, Tor A. Fjeldly

IEEE Transactions on Electron Devices · 2013 · 122 citations · 11 references

Concepts

Abstract

We present an accurate and robust surface-potential-based compact model for simulation of circuits designed with GaN-based high-electron mobility transistors (GaN HEMTs). An accurate analytical surface-potential calculation, which we developed, is used to develop the drain and gate current model. The model is in excellent agreement with experimental data for both drain and gate current in all regions of device operation. We show the correct physical behavior and mathematical robustness of the model by performing various benchmark tests, such as DC and AC symmetry tests, reciprocity test, and harmonic balance simulations test. To the best of our knowledge, this is the first time a GaN HEMT compact model passing a range of benchmark tests has been presented.

References

11