Fringing-induced barrier lowering (FIBL) in sub-100 nm MOSFETs with high- <i>K</i> gate dielectrics

Geoffrey Yeap, S. Krishnan, Ming-Ren Lin

Electronics Letters · 1998 · 85 citations · 1 references

Abstract

Fringing-induced barrier lowering (FIBL), a new anomalous degradation in device turn-off/on characteristics in sub-100 nm devices with high-K gate dielectrics, is reported. FIBL is clearly evident for K &gt; 25 and worsens as K increases (without buffer oxide). With a buffer oxide, FIBL can be completely suppressed for K &lt; 25, and partially for higher K. FIBL worsens as the gate length becomes shorter. Complete removal of high-K dielectrics on the active area induces a smaller FIBL.

References

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