Ming-Ren Lin

FinFET scaling to 10 nm gate length

Bin Yu, Leland Chang, Safayet Ahmed et al. · 2003 · 592 citations

Electrical Engineering, Nm Gate Length, Engineering +12

Variability of resistive switching memories and its impact on crossbar array performance

An Chen, Ming-Ren Lin · 2011 · 150 citations

Non-volatile Memory, Electrical Engineering, Engineering +15

15 nm gate length planar CMOS transistor

Bin Yu, Haihong Wang, Aditya Joshi et al. · 2002 · 90 citations

Electrical Engineering, Engineering, Vlsi Design +10

Fringing-induced barrier lowering (FIBL) in sub-100 nm MOSFETs with high- <i>K</i> gate dielectrics

Geoffrey Yeap, S. Krishnan, Ming-Ren Lin · Electronics Letters · 1998 · 85 citations

Limits of gate-oxide scaling in nano-transistors

Bin Yu, Haihong Wang, C. Riccobene et al. · 2002 · 62 citations

Mosfet Gate Leakage, Electrical Engineering, Nano-scale Mosfet +11