Publication | Closed Access
Limits of gate-oxide scaling in nano-transistors
62
Citations
2
References
2002
Year
Unknown Venue
Mosfet Gate LeakageElectrical EngineeringNano-scale MosfetTransistor Performance DegradationEngineeringTechnology ScalingNanotechnologyNanoelectronicsStress-induced Leakage CurrentApplied PhysicsBias Temperature InstabilityGate-oxide ScalingMicroelectronicsSemiconductor Device
This paper explores the ultimate scaling limit of gate oxide due to MOSFET gate leakage and device performance. The limit on Tox reduction with respect to gate leakage tolerance is considered by the concept of "dynamic" gate leakage in nano-scale MOSFET's. Tox scaling is also limited by transistor performance degradation due to the loss of inversion layer charge through gate leakage and the degradation of carrier mobility in the channel from increased scattering. All the three effects are investigated experimentally on CMOS devices with gate length down to 50 nm and gate Tox down to 12 A. The minimum Tox is proposed and the implications on voltage scaling, high-k gate dielectrics and low-temperature CMOS are discussed.
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