Wafer Scale Variation of Planarization Length in Chemical Mechanical Polishing

Abstract

Chemical mechanical polishing (CMP) has become the preferred planarization method for multilevel interconnect technology due to its ability to achieve a high degree of feature level planarity. However, methods are needed to understand and model both wafer level and die level uniformity in interlevel dielectric (oxide) polishing. This paper examines the variation of die level planarity across the wafer and at different process conditions. Substantial dependency of planarization length, a characteristic length which determines die level planarity, on table speed and down pressure is found, varying from 6.2 to 7.8 mm in the experiments considered here. In addition, a dependence of planarization length on die position within the wafer is found, varying by ∼0.5 mm across the wafer resulting in a difference of ∼300 Å total indicated range from one die to the next. Some die are impacted even more strongly resulting in much smaller planarization lengths (near 5.0 mm in some cases) due to wafer edge effects. We conclude that accurate modeling and optimization of within‐die variation depends on accurate modeling and measurement of not only wafer scale removal rate variation but also wafer scale planarization length variation. © 2000 The Electrochemical Society. All rights reserved.