IEEE Transactions on Electron Devices · 2012 · 179 citations · 20 references
EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSimulation-based DesignDevice CharacterizationDevice ModelingDevice SimulationDistortion AnalysisIii-v SemiconductorsIntegrated Circuit DesignIntermodulation AnalysisIntermodulation DistortionLinearityLinearity AssessmentLinearity EnhancementMetal-oxide-semiconductor Field-effect Transistor ModelingMosfet ModelingTransconductance
In this paper, an extensive study on the intermodulation distortion and the linearity of gate-material-engineered cylindrical-gate MOSFET (GME CGT MOSFET) has been done, and the influence of technology variations such as channel length and gate material workfunction variations is explored using an ATLAS 3-D device simulator. The simulation results reveal that the GME CGT MOSFET design displays a significant enhancement in the device's linearity and intermodulation distortion performance in terms of the figure-of-merit metrics VIP2, VIP3, IIP3, and IMD3 and the higher order transconductance coefficients <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> 1, <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> 2, and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> 3. The results are, thus, useful for optimizing the device bias point for RFIC design with higher efficiency and better linearity performance.
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P.H. Woerlee, M.J. Knitel, R. van Langevelde et al. · IEEE Transactions on Electron Devices · 2001 · 333 citations