Mapping of mechanical stresses in silicon substrates due to lead tin solder bump reflow process via synchrotron x-ray topography and finite element modelling

Abstract

White beam synchrotron x-ray topography (WBSXRT) is a non-destructive technique, which is capable of analysing the strain and/or dislocation distribution in single crystal materials. This paper discusses the application of WBSXRT to the analysis of strain fields due to the microelectronic packaging of integrated circuits. A ball grid array package containing an Intel® Pentium® III microprocessor was employed to investigate the spatial extent of strain fields imposed on the underlying silicon substrate due to the reflow process for lead–tin solder bumps.