Low-power ferroelectric random access memory embedded in 180nm analog friendly CMOS technology

Krishna Udayakumar, Tamer San, J. Antonio Travieso-Rodríguez, S. Chevacharoenkul, D.C. Frystak, J. Rodriguez-Latorre, C. Zhou, Michael Ball, Patrick Ndai, Siddharth Madan,

2013 · 24 citations · 4 references

Concepts

Abstract

An embedded 448kb 2T-2C FRAM, integrated into a 180nm analog process flow, has been developed and qualified for more than 10years data retention at 125°C. Key electrical characteristics of the memory include wide signal margins with no outlier bits, high endurance write/read cycling (>>10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">15</sup> cycles), stable retention (>>10yrs at 125°C), and extremely low bit error rate following 260°C Pb-free solder board-attach reflow. Results suggest that the technology can find wide use in applications ranging from consumer electronics to automotive where highly reliable embedded memory and analog components are required.

References

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