T. S. Moise - Concepedia

Author

T. S. Moise

Also Known As

D. Blanks, T. Moise, T. S. MOISE, T. S. Moise, T.S. Moise, T.S. Moïse, THEODORE S. MOISE, Ted Moise, Ted S. Moise, Theodore Moise

111

Publications

1.9K

Citations

H-Index

102

Concepts

All Affiliations

Texas Instruments (United States)Yale University Agilent Technologies (United States)The University of Texas at Dallas Physiological Society

About

T. S. Moise is an author at Texas Instruments (United States) specializing in engineering, applied physics, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	21	33	1.3K
2	Natural Sciences	4	4	158
3	Medicine	3	3	51
4	Health Sciences	2	2	34
5	Public Health	1	1	17

T. S. Moise

Publications

1.7K

Citations

H-Index

Page 1

	Year	Citations
A monolithic 4-bit 2-Gsps resonant tunneling analog-to-digital converter T.P.E. Broekaert, B. Brar, J.P.A. van der Wagt, IEEE Journal of Solid-State Circuits Resonant-tunneling DiodesData ConverterMixed-signal Integrated CircuitAnalog DesignVersatile Technology	1998	220
Quantitative simulation of a resonant tunneling diode R. Chris Bowen, Gerhard Klimeck, Roger K. Lake, Journal of Applied Physics Device ModelingQuantum ScienceElectrical EngineeringEngineeringTunneling Microscopy	1997	158
A 64-Mb Embedded FRAM Utilizing a 130-nm 5LM Cu/FSG Logic Process H. McAdams, R. Acklin, T.G.W. Blake, IEEE Journal of Solid-State Circuits 64-Mb Embedded FramNon-volatile MemoryEngineeringVlsi DesignElectronic Design	2004	119
Quantum device simulation with a generalized tunneling formula Gerhard Klimeck, Roger K. Lake, R. Chris Bowen, Applied Physics Letters Generalized Tunneling FormulaQuantum ScienceContinuum StatesEngineeringQuantum Computing	1995	109
Reliability Properties of Low-Voltage Ferroelectric Capacitors and Memory Arrays J. Antonio Travieso-Rodríguez, K. Remack, K. Boku, IEEE Transactions on Device and Materials Reliability ReliabilityNon-volatile MemoryElectrical EngineeringEngineeringReliability Properties	2004	107
Roadmap for Ferroelectric Domain Wall Nanoelectronics Pankaj Sharma, T. S. Moise, Luigi Colombo, Advanced Functional Materials EngineeringNanodevicesElectronic PropertiesPolar OrderMultiferroics	2021	76
Reliability of Ferroelectric Random Access memory embedded within 130nm CMOS J. Rodriguez, K. Remack, J. Gertas, Non-volatile MemoryEngineeringCu Cmos PlatformEmerging Memory TechnologyFerroelectric Random-access Memory	2010	58
Magnitude, origin, and evolution of piezoelectric optical nonlinearities in strained [111]B InGaAs/GaAs quantum wells Alexander N. Cartwright, D. S. McCallum, Thomas F. Boggess, Journal of Applied Physics Categoryquantum ElectronicsOptical MaterialsEngineeringExcitonic BleachingOptoelectronic Devices	1993	56
SOC CMOS technology for personal internet products D.D. Buss, Brian L. Evans, J. Bellay, IEEE Transactions on Electron Devices System On ChipElectrical EngineeringEngineeringDevice IntegrationMixed-signal Integrated Circuit	2003	53
Demonstration of a 4 Mb, high density ferroelectric memory embedded within a 130 nm, 5 LM Cu/FSG logic process T. S. Moise, Scott R. Summerfelt, H. McAdams, Materials ScienceHardware SecurityElectrical EngineeringSpintronicsLm Cu/fsg	2003	49

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