Transistor delay analysis and effective channel velocity extraction in AlGaN/GaN HFETs

Abstract

Performed a thorough transistor delay analysis on 0.2 /spl mu/m AlGaN/GaN HFETs implemented on sapphire substrates to identify the various contributions to the total transistor delay 1/2/spl pi/f/sub T/ = /spl tau//sub T/ as a function of gate-drain separation L/sub GD/. We found that the main delay component depends linearly upon the total access resistance of the source and drain regions determined from 'COLDFET' S-parameter measurements, indicating the contribution of extrinsic regions to the transistor delay cannot be neglected for AlGaN/GaN HFETs. Stripping the masking effects of the R/sub S/ and R/sub D/ series resistances reveals an effective channel velocity of /spl sim/3.3 /spl times/ 10/sup 7/ cm/s which is much higher than the values of 1.2-1.3 /spl times/ 10/sup 7/ cm/s generally inferred from f/sub T/ data, but in excellent agreement with predictions from Monte Carlo transport simulations. We also show that process-specific details for devices fabricated on the same epitaxial layers affect the f/sub T/(L/sub GD/) dependence.