Process Variation Compensation

Process Variation Compensation is a methodological technique in mixed-signal integrated circuit design that mitigates performance deviations caused by manufacturing process variations through adaptive calibration or design-level countermeasures.

174

Publications

6.6K

Citations

585

Authors

172

Institutions

Publications per year

2017–2026

27

Authors

585

  1. SH
    Seung H. Kang

    Qualcomm (United States), United States

    5 publications · 152 citations

    5

    h-index

  2. VD
    Vivek De

    Intel (United States), United States

    5 publications · 910 citations

    5

    h-index

  3. JP
    Jung Pill Kim

    Qualcomm (United States), United States

    5 publications · 152 citations

    5

    h-index

  4. TN
    Taehui Na

    Yonsei University, South Korea

    5 publications · 152 citations

    5

    h-index

  5. SJ
    Seong‐Ook Jung

    Yonsei University, South Korea

    5 publications · 152 citations

    5

    h-index

1–5 of 585

Venues

  1. 9

    h-index

  2. 8

    h-index

  3. IEEE Journal of Solid-State Circuits

    6 publications · 1.1K citations

    6

    h-index

  4. 5

    h-index

  5. 5

    h-index

1–5