Mask Set Design

Mask Set Design is a scholarly methodological framework within semiconductor lithography that specifies the systematic arrangement and patterning of multiple masks used in integrated circuit fabrication to achieve precise layer alignment and functional device integration.

Publications

1.1K

Citations

215

Authors

Institutions

Publications per year

2017–2026

Variants

Photomask Set Design

Parents

Mask Design

Publications

Junction termination extension for near-ideal breakdown voltage in p-n junctions

V.A.K. Temple, W. Tantraporn · IEEE Transactions on Electron Devices · 1986 · 101 citations

Engineering, Electrical Engineering, Materials Science +17

Design methodology for IC manufacturability based on regular logic-bricks

V. Kheterpal, Vyacheslav Rovner, Thiago Hersan et al. · 2005 · 92 citations

Engineering, Computer Engineering, Computer Science +17

Lock release lithography for 3D and composite microparticles

Ki Wan Bong, Daniel C. Pregibon, Patrick S. Doyle · Lab on a Chip · 2009 · 87 citations

Engineering, Materials Engineering, Materials Science +17

Highly manufacturable 7nm FinFET technology featuring EUV lithography for low power and high performance applications

Daewon Ha, Chul‐Ju Yang, Juyul Lee et al. · 2017 · 70 citations

Engineering, Computer Engineering, Electrical Engineering +16

Gridded design rule scaling: taking the CPU toward the 16nm node

Christopher Bencher, Huixiong Dai, Yong Mei Chen · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2009 · 51 citations

Engineering, Computer Engineering, Electrical Engineering +16

1–5 of 42

Authors

215

AJ
Andrzej J. Strojwas
Carnegie Mellon University, United States
2 publications · 125 citations
2
h-index
DE
David E. Seeger
IBM Research - Thomas J. Watson Research Center, United States
2 publications · 35 citations
2
h-index
AW
A.D. Wilson
Government of the United Kingdom, United Kingdom
2 publications · 35 citations
2
h-index
DM
D. Motiani
Carnegie Mellon University, United States
2 publications · 125 citations
2
h-index
YT
Y. Takegawa
Toshiba (Japan), Japan
2 publications · 125 citations
2
h-index

1–5 of 215

Institutions

1–8 of 53

Venues

Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
6 publications · 144 citations
6
h-index
Journal of Vacuum Science & Technology B Microelectronics Processing and Phenomena
2 publications · 35 citations
2
h-index
IEEE Transactions on Electron Devices
2 publications · 114 citations
2
h-index
Applied Surface Science
2 publications · 40 citations
2
h-index
Design Automation Conference
Conference · 2 publications · 30 citations
2
h-index

1–5