C.-H. Jan

A 90-nm logic technology featuring strained-silicon

Scott E. Thompson, M Armstrong, C. Auth et al. · IEEE Transactions on Electron Devices · 2004 · 654 citations

Electrical Engineering, Engineering, Nanoelectronics +10

A 22nm SoC platform technology featuring 3-D tri-gate and high-k/metal gate, optimized for ultra low power, high performance and high density SoC applications

C.-H. Jan, Uma Bhattacharya, R. Brain et al. · 2012 · 303 citations

Engineering, Vlsi Design, Computer Architecture +18

RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

C.-H. Jan, M. Agostinelli, H. Deshpande et al. · 2010 · 84 citations

Engineering, Vlsi Design, Rf Soc +16

A 32nm SoC platform technology with 2<sup>nd</sup> generation high-k/metal gate transistors optimized for ultra low power, high performance, and high density product applications

C.-H. Jan, M. Agostinelli, Markus J. Buehler et al. · 2009 · 75 citations

Engineering, Vlsi Design, Computer Architecture +20

A 65nm CMOS SOC Technology Featuring Strained Silicon Transistors for RF Applications

I. Post, M.S. Akbar, G. Curello et al. · 2006 · 57 citations

Low-power Electronics, Pmos Transistors, Electrical Engineering +11