Azuma Suzuki

A 0.7 V Single-Supply SRAM With 0.495 $\mu$m$^{2}$ Cell in 65 nm Technology Utilizing Self-Write-Back Sense Amplifier and Cascaded Bit Line Scheme

K. Kushida, Azuma Suzuki, Gou Fukano et al. · IEEE Journal of Solid-State Circuits · 2009 · 52 citations

Engineering, Computer Engineering, Electrical Engineering +17

A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm<sup>2</sup> cell in 32nm high-<inf>k</inf> metal-gate CMOS

Yuki Fujimura, Osamu Hirabayashi, Takahiko Sasaki et al. · 2010 · 46 citations

Engineering, Computer Engineering, Electrical Engineering +15

A Digitized Replica Bitline Delay Technique for Random-Variation-Tolerant Timing Generation of SRAM Sense Amplifiers

Yusuke Niki, Atsushi Kawasumi, Azuma Suzuki et al. · IEEE Journal of Solid-State Circuits · 2011 · 38 citations

Engineering, Computer Engineering, Electrical Engineering +15

A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit

Fumihiko Tachibana, Osamu Hirabayashi, Y. Takeyama et al. · IEEE Journal of Solid-State Circuits · 2013 · 20 citations

Engineering, Computer Engineering, Electrical Engineering +15

A 0.7V single-supply SRAM with 0.495um<sup>2</sup> cell in 65nm technology utilizing self-write-back sense amplifier and cascaded bit line scheme

K. Kushida, Azuma Suzuki, Gou Fukano et al. · 2008 · 17 citations

Engineering, Computer Engineering, Electrical Engineering +16