R. Franiatte

3D Integration of CMOS image sensor with coprocessor using TSV last and micro-bumps technologies

P. Coudrain, D. Henry, A. Berthelot et al. · 2013 · 18 citations

Engineering, Face-to-back Integration Scheme, Integrated Circuits +17

Development on wafer level anisotropic conductive film for flip-chip interconnection

Jean-Charles Souriau, J.J. Brun, R. Franiatte et al. · 2004 · 17 citations

Engineering, Wafer Scale Processing, Advanced Packaging (Semiconductors) +16

Detailed Characterisation of Ni Microinsert Technology For Flip Chip Die on Wafer Attachment

A. Mathewson, J.J. Brun, G. Ponthenier et al. · 2007 · 15 citations

Engineering, Mechanical Engineering, Interconnect (Integrated Circuits) +22

Microstructured Interconnections for High Security Systems

A. Mathewson, J.J. Brun, C. Puget et al. · 2006 1st Electronic Systemintegration Technology Conference · 2006 · 13 citations

Hardware Trojan, Engineering, Information Security +20

Wafer level encapsulated materials evaluation for chip on wafer (CoW) approach in 2.5D Si interposer integration

S. Joblot, A. Farcy, N. Hotellier et al. · 2013 · 10 citations