E.G. Ioannidis - Concepedia

Author

E.G. Ioannidis

Institut polytechnique de Grenoble ORCID

Also Known As

E. G. Ioannidis, E. Ioannidis, E.G. Ioannidis, Eleftherios G. Ioannidis, Eleftherios Ioannidis, Ioannidis, E.G.

Publications

631

Citations

H-Index

Concepts

All Affiliations

Institut polytechnique de Grenoble Institut de Microélectronique, Electromagnétisme et Photonique Aristotle University of Thessaloniki Université Grenoble Alpes STMicroelectronics (France)

About

E.G. Ioannidis is an author at Institut polytechnique de Grenoble specializing in electrical engineering, engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	15	17	534
2	Electrical Engineering	15	17	534
3	Applied Physics	13	14	450
4	Computer Engineering	3	3	77
5	Education	1	1	37

E.G. Ioannidis

Publications

534

Citations

H-Index

Page 1

	Year	Citations
Improved analysis and modeling of low-frequency noise in nanoscale MOSFETs E.G. Ioannidis, C.A. Dimitriadis, S. Haendler, Solid-State Electronics Device ModelingElectrical EngineeringEngineeringNanoelectronicsElectronic Engineering	2012	63
Full gate voltage range Lambert-function based methodology for FDSOI MOSFET parameter extraction T.A. Karatsori, Christoforos Theodorou, E.G. Ioannidis, Solid-State Electronics Device ModelingElectrical EngineeringEngineeringMicroelectronicsCircuit Simulation	2015	53
Low-Frequency Noise Sources in Advanced UTBB FD-SOI MOSFETs Christoforos Theodorou, E.G. Ioannidis, F. Andrieu, IEEE Transactions on Electron Devices Electrical EngineeringSemiconductor DeviceEngineeringPhysicsUtbb Technology	2014	51
Low frequency noise variability in high-k/metal gate stack 28nm bulk and FD-SOI CMOS transistors E.G. Ioannidis, S. Haendler, A. Bajolet, Electrical EngineeringFd-soi Cmos TransistorsBulk Cmos TechnologiesVlsi DesignEngineering	2011	45
Characterization of traps in the gate dielectric of amorphous and nanocrystalline silicon thin-film transistors by 1/f noise E.G. Ioannidis, A. Tsormpatzoglou, D.H. Tassis, Journal of Applied Physics Electrical EngineeringH TftsEngineeringPhysicsNanoelectronics	2010	43
Effect of Localized Interface Charge on the Threshold Voltage of Short-Channel Undoped Symmetrical Double-Gate MOSFETs E.G. Ioannidis, A. Tsormpatzoglou, D.H. Tassis, IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringSemiconductor DeviceEngineeringNanoelectronics	2010	39
Toward Automated Defect Extraction From Bias Temperature Instability Measurements Dominic Waldhoer, Christian Schleich, Jakob Michl, IEEE Transactions on Electron Devices EngineeringMeasurementEducationDefect ToleranceReliability Engineering	2021	37
Impact of Source–Drain Series Resistance on Drain Current Mismatch in Advanced Fully Depleted SOI n-MOSFETs E.G. Ioannidis, Christoforos Theodorou, S. Haendler, IEEE Electron Device Letters Device ModelingElectrical EngineeringEngineeringOther Mismatch ParametersSource–drain Series Resistance	2015	32
Drain-Current Flicker Noise Modeling in nMOSFETs From a 14-nm FDSOI Technology E.G. Ioannidis, Christoforos Theodorou, T.A. Karatsori, IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringEngineeringNanoelectronicsElectronic Engineering	2015	27
Evidence of Tunneling Driven Random Telegraph Noise in Cryo-CMOS Jakob Michl, Alexander Grill, Bernhard Stampfer, 2021 IEEE International Electron Devices Meeting (IEDM) Nuclear TunnelingQuantum ScienceElectrical EngineeringDefect ToleranceEngineering	2021	22

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