X. Liu

A 0.18 μm BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect

Alvin Joseph, D. Coolbaugh, M. Zierak et al. · 2002 · 129 citations

Engineering, Electrical Engineering, Microelectronics +16

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

P. Agnello, T. Ivers, C. Warm et al. · 2006 · 115 citations

Engineering, Computer Engineering, Electrical Engineering +17

Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications

J. Zhang, Julien Frougier, Andrew Greene et al. · 2019 · 97 citations

Engineering, Electrical Engineering, Materials Science +17

Chip-to-package interaction for a 90 nm Cu / PECVD low-k technology

W. Landers, D. Edelstein, L. A. Clevenger et al. · 2004 · 25 citations

Engineering, Electrical Engineering, Materials Science +15

A 45 nm CMOS node Cu/Low-k/ Ultra Low-k PECVD SiCOH (k=2.4) BEOL Technology

S. Sankaran, S. Arai, R. Augur et al. · 2006 · 22 citations

Engineering, Electrical Engineering, Materials Science +17