S. Kubicek

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

Hans Mertens, R. Ritzenthaler, Adrian Chasin et al. · 2016 · 149 citations

Semiconductors, Semiconductor Technology, Electrical Engineering +15

Work function of Ni silicide phases on HfSiON and SiO/sub 2/: NiSi, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/, and Ni/sub 3/Si fully silicided gates

J. A. Kittl, Małgorzata Pawlak, A. Lauwers et al. · IEEE Electron Device Letters · 2005 · 71 citations

Materials Science, Electrical Engineering, Engineering +15

Limitations of shift-and-ratio based L/sub eff/ extraction techniques for MOS transistors with halo or pocket implants

H. van Meer, K. Henson, Junyi Lyu et al. · IEEE Electron Device Letters · 2000 · 47 citations

Device Modeling, Electrical Engineering, Engineering +12

Impact of through silicon via induced mechanical stress on fully depleted Bulk FinFET technology

Wei Guo, Geert Van der Plas, Alojz Ivankoviç et al. · 2012 · 36 citations

Engineering, Mechanical Engineering, Silicon On Insulator +18

Practical accuracy analysis of some existing effective channel length and series resistance extraction methods for MOSFET's

S. Biesemans, M. Hendriks, S. Kubicek et al. · IEEE Transactions on Electron Devices · 1998 · 32 citations

Device Modeling, Effective Channel Length, Electrical Engineering +10