D. Lea

SRAM cell design for stability methodology

C. Wann, Robert Wong, David Frank et al. · 2005 · 149 citations

Engineering, Computer Engineering, Electrical Engineering +10

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

P. Agnello, T. Ivers, C. Warm et al. · 2006 · 115 citations

Engineering, Computer Engineering, Electrical Engineering +17

High speed 45nm gate length CMOSFETs integrated into a 90nm bulk technology incorporating strain engineering

V. Chan, R. Rengarajan, N. Rovedo et al. · 2004 · 76 citations

Engineering, Electrical Engineering, Microelectronics +16

Progress on tunerless SIS mixers for the 200-300 GHz band

A. R. Kerr, S.-K. Pan, A. W. Lichtenberger et al. · IEEE Microwave and Guided Wave Letters · 1992 · 37 citations

Engineering, Electrical Engineering, Electronic Materials +16

Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications

C. Kothandaraman, X. Chen, D. Moy et al. · 2015 · 22 citations

Engineering, Electrical Engineering, Materials Science +17