IEEE Transactions on Electron Devices · 2025 · 10 citations · 37 references
EngineeringElectrical EngineeringPhysicsMicroelectronicsSemiconductor DevicesThin FilmsAtomic Layer DepositionNoise In Electronic DevicesNoise In Semiconductor DevicesSemiconductor Thin FilmsThin Film AnnealingThin-film TransistorsLow-frequency NoiseNoise CharacteristicsNoise In Field-effect TransistorsNoise In Metal-oxide-semiconductor Field-effect TransistorsNoise Sources In Semiconductor MaterialsPost-deposition AnnealingSemiconductor NoiseThermal Annealing
In this work, we investigate the 1/<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> noise, i.e., low-frequency noise (LFN), characteristics of scaled atomic-layer-deposited indium–gallium–zinc oxide (IGZO) thin-film transistors (TFTs) focusing on key factors such as: 1) varying indium (In) concentrations; 2) post-thermal annealing; and 3) channel length (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ch</roman></sub><roman xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">)</roman> scaling. Increasing the In ratio from 2:1:1 to 7:1:1 enhances field-effect mobility (μ<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>FE</roman></sub><roman xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">)</roman> from 11.2 to 36.6 cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>2</roman></sup>/V and reduces LFN by up to 85%, demonstrating the role of In content in improving both electrical performance and noise characteristics. Post-annealing further mitigates LFN, achieving reductions of up to 68%, depending on the IGZO compositions. As <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ch</roman></sub> scales down, the dominant LFN mechanism shows a tendency to shift from mobility fluctuations (Δμ) in long-channel devices (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ch</roman></sub>= 1 μm) to carrier number fluctuations (Δn) in short-channel devices (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ch</roman></sub>= 50 nm), as indicated by the distinct dependence of normalized drain-current power spectral density (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ID</roman></sub>/<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>D</roman></sub><sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>2</roman></sup><roman xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">)</roman> on gate overdrive voltage. This behavior, supported by LFN measurements at elevated temperatures (~125 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">∘</sup>C) and bias temperature instability (BTI) analyses, highlights the increasing influence of near-interface traps in scaled devices.
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F.N. Hooge · IEEE Transactions on Electron Devices · 1994 · 993 citations · Full text
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
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Improved Analysis of Low Frequency Noise in Field-Effect MOS Transistors
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