Self-Rectifying Memory Cell Based on SiGeAsSe Ovonic Threshold Switch

Abstract

Cross-point array architecture offers a path toward low-cost storage-class memory (SCM). However, it requires a selector, such as an ovonic threshold switch (OTS) in series with the memory element, thus increasing the complexity of the bit cell. Furthermore, phase change memory (PCM), typically targeted for SCM applications, is limited by its large RESET current. Therefore, there is a demand for a new easy-to-fabricate self-selecting memory cell, capable of overcoming the limitations of PCM. Here, we propose a self-rectifying OTS-only memory (SR-OTSM), thus greatly simplifying the integration process compared to conventional 1OTS–1PCM cell. This novel memory is enabled by the semi-persistent polarity-induced threshold voltage shift recently observed in OTS materials. We describe the operation of such a cell and discuss the unique properties of the memory effect in Si-Ge-As-Se OTS. Specifically, we demonstrate excellent memory performance in SiGeAsSe-based SR-OTSM: ultralow Write current ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$&lt; 15 \mu \text{A}$ </tex-math></inline-formula> , i.e., < 0.6 MA/cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{{2}}{)}$ </tex-math></inline-formula> , fast Read/Write operation ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 10 ns) and good endurance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{{8}}$ </tex-math></inline-formula> cycles).