Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate

Abstract

Abstract A feasible approach is reported to reduce the switching current and increase the nonlinearity in a complementary metal–oxide–semiconductor (CMOS)‐compatible Ti/SiN x /p + ‐Si memristor by simply reducing the cell size down to sub‐100 nm. Even though the switching voltages gradually increase with decreasing device size, the reset current is reduced because of the reduced current overshoot effect. The scaled devices (sub‐100 nm) exhibit gradual reset switching driven by the electric field, whereas that of the large devices (≥1 µm) is driven by Joule heating. For the scaled cell (60 nm), the current levels are tunable by adjusting the reset stop voltage for multilevel cells. It is revealed that the nonlinearity in the low‐resistance state is attributed to Fowler–Nordheim tunneling dominating in the high‐voltage regime (≥1 V) for the scaled cells. The experimental findings demonstrate that the scaled metal–nitride–silicon memristor device paves the way to realize CMOS‐compatible high‐density crosspoint array applications.