Recessed-Gate Enhancement-Mode $\beta $ -Ga2O3 MOSFETs

Abstract

We report enhancement-mode <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula> -Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (BGO) MOSFETs on a Si-doped homoepitaxial channel grown by molecular beam epitaxy. A gate recess process is used to partially remove the epitaxial channel under the 1- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> gated region to fully deplete at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\textsf {GS}}= 0$ </tex-math></inline-formula> V. BGO MOSFETs achieve drain current density near 40 mA/mm and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ </tex-math></inline-formula> ratio ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> which is the highest reported for homoepitaxial normally-off BGO transistors. At <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\textsf {GS}}= \textsf {0}$ </tex-math></inline-formula> V, a breakdown voltage of 198 and 505 V is achieved with the source–drain spacing of 3 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$8~\mu \text{m}$ </tex-math></inline-formula> , respectively. The power switching figure of merits for dc conduction and dynamic switch losses meet or exceed the theoretical silicon limit and previously reported depletion-mode BGO transistors.