Publication | Open Access
NBTI-Generated Defects in Nanoscaled Devices: Fast Characterization Methodology and Modeling
31
Citations
25
References
2017
Year
EngineeringDefect ToleranceVoltage Step StressSemiconductor DeviceNbti AgingNanoelectronicsElectronic PackagingNanoscaled DevicesElectrical EngineeringHardware ReliabilityPhysicsBias Temperature InstabilityDefect FormationSemiconductor Device FabricationNbti-generated DefectsDevice ReliabilityMicroelectronicsApplied PhysicsCircuit Reliability
Negative bias temperature instability (NBTI)-generated defects (GDs) have been widely observed and known to play an important role in device's lifetime. However, its characterization and modeling in nanoscaled devices is a challenge due to their stochastic nature. The objective of this paper is to develop a fast and accurate technique for characterizing the statistical properties of NBTI aging, which can be completed in one day and thus reduce test time significantly. The fast speed comes from replacing the conventional constant voltage stress by the voltage step stress (VSS), while the accuracy comes from capturing the GDs without recovery. The key advances are twofold: first, we demonstrate that this VSS-GD technique is applicable for nanoscaled devices; second, we verify the accuracy of the statistical model based on the parameters extracted from this technique against independently measured data. The proposed method provides an effective solution for GD evaluation, as required when qualifying a CMOS process.
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