IEEE Transactions on Components Packaging and Manufacturing Technology Part A · 1995 · 24 citations · 6 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsMicroelectronicsSemiconductor DevicesChip PackagingIntegrated Circuit DesignInterconnect TechnologyPackaging EngineeringPhysical DesignWafer BondingChip-scale PackagingDevice PackagingFlip-chip BondingFlip-chip BumpingFlip-chip PackagingPackage ModelingThree-dimensional Integration
A new flip-chip-like package named chip scale package (CSP) has been developed. It is constructed of LSI chips, thin resin coats, and electrode balls, having no leadframe nor any bonding wires. Wiring conductor patterns were used for electrical connection between internal pads on the die and external electrode balls. Also the transfer-bumping technique was applied for inner bump formation. Finally, solder joint life when mounted onto typical boards was estimated by simulation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Thermal Stress and Low Cycle Fatigue
S. S. Manson, Thomas J. Dolan · Journal of Applied Mechanics · 1966 · 727 citations · Full text
G.W.A.D. · Microelectronics Reliability · 1984 · 157 citations
Flip-chip on FR-4 integrated circuit packaging
Douglas Powell, Aalok Trivedi · 2002 · 48 citations
Engineering, Electrical Engineering, Materials Engineering +14