Chip scale package: "a lightly dressed LSI chip"

Masahiro Yasunaga, Shinji Baba, M. Matsuo, H. Matsushima, S. Nakao, Toshihiro TACHIKAWA

IEEE Transactions on Components Packaging and Manufacturing Technology Part A · 1995 · 24 citations · 6 references

Concepts

Abstract

A new flip-chip-like package named chip scale package (CSP) has been developed. It is constructed of LSI chips, thin resin coats, and electrode balls, having no leadframe nor any bonding wires. Wiring conductor patterns were used for electrical connection between internal pads on the die and external electrode balls. Also the transfer-bumping technique was applied for inner bump formation. Finally, solder joint life when mounted onto typical boards was estimated by simulation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

6