Paralleling of low-voltage MOSFETs operating in avalanche conditions

Abstract

This paper addresses the behavior of low voltage MOSFETs under breakdown avalanche operation. The phenomena leading to avalanche operation of the MOSFET transistors in automotive applications are first presented. Then, after a brief description of the model and of the experimental identification of its parameters, electrothermal simulations are performed. A special focus is given to the current balance between paralleled MOSFETs, because in this case breakdown voltage mismatches are a well-known reliability issue. These simulations demonstrate the influence of the specific avalanche path resistance on current sharing. Calculations performed using the proposed model give results far less pessimistic (lower temperature rise on the most stressed transistor) than classical temperature-dependant-only avalanche models. This avoids expensive specifications narrowing when designing for mass-market applications (where wide manufacturing dispersions occur)