2008 · 18 citations · 12 references
EngineeringOptoelectronic DevicesSemiconductor DeviceSemiconductorsTunneling MicroscopyNanoelectronicsMolecular Beam EpitaxyEpitaxial GrowthCompound SemiconductorSemiconductor TechnologyElectrical EngineeringAspect Ratio TrappingCrystalline DefectsSi SubstratesSemiconductor Device FabricationHigh QualityApplied PhysicsAspect RatioBest Gaas EsakiOptoelectronicsSemiconductor Industry
High quality, low defect GaAs virtual substrates on Si, produced by the aspect ratio trapping growth technique, have been used for the fabrication of n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> GaAs/n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> InGaAs/p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> GaAs Esaki diodes. All epitaxial layers were grown by reduced-pressure chemical vapor deposition/metalorganic chemical vapor deposition , instead of the molecular beam epitaxy technique commonly used for most high performance Esaki diodes. Four Esaki diode structures were fabricated and measured, with current densities up to 1 kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Peak-to-valley current ratios up to 56 have been achieved, which is greater than twice that of the best GaAs Esaki diodes previously reported.
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J.P.A. van der Wagt · Proceedings of the IEEE · 1999 · 129 citations
Low Current Density, Non-volatile Memory, Electrical Engineering +9
Study of the defect elimination mechanisms in aspect ratio trapping Ge growth
Jie Bai, Ji‐Sang Park, Zhiyuan Cheng et al. · Applied Physics Letters · 2007 · 98 citations